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Searched refs:PLLE_AUX_SEQ_ENABLE (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/tegra/
H A Dclk-pll.c98 #define PLLE_AUX_SEQ_ENABLE BIT(24) macro
1632 val &= ~PLLE_AUX_SEQ_ENABLE; in clk_plle_tegra114_enable()
1687 val |= PLLE_AUX_SEQ_ENABLE; in clk_plle_tegra114_enable()
2469 if (val & PLLE_AUX_SEQ_ENABLE) in clk_plle_tegra210_enable()
2538 if (val & PLLE_AUX_SEQ_ENABLE) in clk_plle_tegra210_disable()
H A Dclk-tegra210.c412 #define PLLE_AUX_SEQ_ENABLE (1 << 24) macro
505 if (value & PLLE_AUX_SEQ_ENABLE) in tegra210_plle_hw_sequence_is_enabled()
534 value |= PLLE_AUX_SEQ_ENABLE; in tegra210_plle_hw_sequence_start()