Searched refs:PLL4 (Results 1 – 14 of 14) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | qcom,lcc-ipq806x.h | 9 #define PLL4 0 macro
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| H A D | qcom,lcc-msm8960.h | 9 #define PLL4 0 macro
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| H A D | stm32mp13-clks.h | 22 #define PLL4 9 macro
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| H A D | stm32mp1-clks.h | 186 #define PLL4 179 macro
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| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp157c-odyssey.dts | 41 assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF/U-Boot */
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| H A D | stm32mp15xc-lxa-tac.dtsi | 230 assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF */
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| /linux/drivers/clk/qcom/ |
| H A D | lcc-ipq806x.c | 401 [PLL4] = &pll4.clkr,
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| H A D | lcc-msm8960.c | 397 [PLL4] = &pll4.clkr,
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| /linux/drivers/net/wireless/ath/ath9k/ |
| H A D | reg.h | 1377 #define PLL4 0x1618c macro
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| H A D | hw.c | 744 while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0) { in ar9003_get_pll_sqsum_dvc()
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| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-ipq8064.dtsi | 501 clocks = <&pxo_board>, <&cxo_board>, <&lcc PLL4>;
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| H A D | qcom-apq8064.dtsi | 690 <&lcc PLL4>;
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| /linux/drivers/clk/stm32/ |
| H A D | clk-stm32mp1.c | 1780 PLL(PLL4, "pll4", ref4_parents, 0, RCC_PLL4CR, RCC_RCK4SELR),
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| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am65-main.dtsi | 1017 * Set vp2 clk (DPI_1_IN_CLK) mux to PLL4 via
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