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Searched refs:PLL2 (Results 1 – 8 of 8) sorted by relevance

/linux/sound/soc/codecs/
H A Dak4642.c114 #define PLL2 (1 << 6) macro
117 #define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0)
345 pll = PLL2; in ak4642_dai_set_sysclk()
348 pll = PLL2 | PLL0; in ak4642_dai_set_sysclk()
351 pll = PLL2 | PLL1; in ak4642_dai_set_sysclk()
354 pll = PLL2 | PLL1 | PLL0; in ak4642_dai_set_sysclk()
357 pll = PLL3 | PLL2; in ak4642_dai_set_sysclk()
360 pll = PLL3 | PLL2 | PLL0; in ak4642_dai_set_sysclk()
367 pll = PLL3 | PLL2 | PLL1; in ak4642_dai_set_sysclk()
371 pll = PLL3 | PLL2 | PLL1 | PLL0; in ak4642_dai_set_sysclk()
/linux/include/dt-bindings/clock/
H A Dstm32mp13-clks.h20 #define PLL2 7 macro
H A Dstm32mp1-clks.h184 #define PLL2 177 macro
/linux/Documentation/devicetree/bindings/clock/
H A Dst,nomadik.txt30 - clock-id: must be 1 or 2 for PLL1 and PLL2 respectively
/linux/drivers/media/dvb-frontends/
H A Dzl10039.c41 PLL2, enumerator
/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-stn8815.dtsi196 * that is parent of TIMCLK, PLL1 and PLL2
241 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
/linux/drivers/clk/stm32/
H A Dclk-stm32mp1.c1778 PLL(PLL2, "pll2", ref12_parents, 0, RCC_PLL2CR, RCC_RCK12SELR),
2098 PLL2,
/linux/drivers/clk/
H A DKconfig201 Y4 and Y5 derive from PLL2