Searched refs:PHY_S6G_PLL5G_CFG2 (Results 1 – 2 of 2) sorted by relevance
19 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in pll5g_detune()23 PHY_S6G_PLL5G_CFG2, rd_dat); in pll5g_detune()34 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in pll5g_tune()37 PHY_S6G_PLL5G_CFG2, rd_dat); in pll5g_tune()
105 #define PHY_S6G_PLL5G_CFG2 0x08 macro