Searched refs:PHY_RESET (Results 1 – 8 of 8) sorted by relevance
30 #define PHY_RESET BIT(7) macro55 qcom_ssphy_updatel(priv->base + PHY_CTRL1, PHY_RESET, in qcom_ssphy_do_reset()56 PHY_RESET); in qcom_ssphy_do_reset()58 qcom_ssphy_updatel(priv->base + PHY_CTRL1, PHY_RESET, 0); in qcom_ssphy_do_reset()
21 #define PHY_RESET BIT(0) macro85 REF_SSP_EN | PHY_RESET; in hix5hd2_sata_phy_init()88 val &= ~PHY_RESET; in hix5hd2_sata_phy_init()
188 writel(((val & ~PHY_RESET) | PHY_RESET), phy->base + in emac_sgmii_reset_prepare()193 writel((val & ~PHY_RESET), phy->base + EMAC_EMAC_WRAPPER_CSR2); in emac_sgmii_reset_prepare()
172 #define PHY_RESET BIT(0) macro
75 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 /* #PHY_RESET */
52 #define PHY_RESET (1 << 5) macro
209 reg |= PHY_RESET; in bcm_sf2_gphy_enable_set()214 reg &= ~PHY_RESET; in bcm_sf2_gphy_enable_set()216 reg |= EXT_PWR_DOWN | IDDQ_BIAS | PHY_RESET; in bcm_sf2_gphy_enable_set()
1577 #define PHY_RESET 0x02 macro