Searched refs:PHY_INTERFACE_MODE_RXAUI (Results 1 – 3 of 3) sorted by relevance
/linux/drivers/phy/marvell/ |
H A D | phy-mvebu-cp110-comphy.c | 224 ETH_CONF(2, 0, PHY_INTERFACE_MODE_RXAUI, 0x1, COMPHY_FW_MODE_RXAUI), 234 ETH_CONF(3, 1, PHY_INTERFACE_MODE_RXAUI, 0x1, COMPHY_FW_MODE_RXAUI), 242 ETH_CONF(4, 0, PHY_INTERFACE_MODE_RXAUI, 0x2, COMPHY_FW_MODE_RXAUI), 251 ETH_CONF(5, 1, PHY_INTERFACE_MODE_RXAUI, 0x2, COMPHY_FW_MODE_RXAUI), 362 case PHY_INTERFACE_MODE_RXAUI: in mvebu_comphy_ethernet_init_reset() 387 if (lane->submode == PHY_INTERFACE_MODE_RXAUI) { in mvebu_comphy_ethernet_init_reset() 748 case PHY_INTERFACE_MODE_RXAUI: in mvebu_comphy_power_on_legacy() 783 case PHY_INTERFACE_MODE_RXAUI: in mvebu_comphy_power_on()
|
/linux/drivers/net/phy/ |
H A D | phylink.c | 269 case PHY_INTERFACE_MODE_RXAUI: in phylink_interface_max_speed() 583 case PHY_INTERFACE_MODE_RXAUI: in phylink_get_capabilities() 2158 state->interface != PHY_INTERFACE_MODE_RXAUI && in phylink_validate_phy()
|
/linux/drivers/net/dsa/mv88e6xxx/ |
H A D | chip.c | 797 __set_bit(PHY_INTERFACE_MODE_RXAUI, supported); in mv88e6390x_phylink_get_caps()
|