Home
last modified time | relevance | path

Searched refs:PHY_INTERFACE_MODE_5GBASER (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/net/phy/
H A Dmarvell10g.c818 __set_bit(PHY_INTERFACE_MODE_5GBASER, possible); in mv3310_fill_possible_interfaces()
1010 phydev->interface = PHY_INTERFACE_MODE_5GBASER; in mv3310_update_interface()
1181 __set_bit(PHY_INTERFACE_MODE_5GBASER, mask); in mv3310_init_supported_interfaces()
1192 __set_bit(PHY_INTERFACE_MODE_5GBASER, mask); in mv3340_init_supported_interfaces()
1202 __set_bit(PHY_INTERFACE_MODE_5GBASER, mask); in mv2110_init_supported_interfaces()
H A Dsfp-bus.c291 __set_bit(PHY_INTERFACE_MODE_5GBASER, interfaces); in sfp_parse_support()
374 return PHY_INTERFACE_MODE_5GBASER; in sfp_select_interface()
H A Dphylink.c128 PHY_INTERFACE_MODE_5GBASER,
186 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ in phylink_interface_signal_rate()
237 case PHY_INTERFACE_MODE_5GBASER: in phylink_interface_max_speed()
550 case PHY_INTERFACE_MODE_5GBASER: in phylink_get_capabilities()
931 case PHY_INTERFACE_MODE_5GBASER: in phylink_parse_mode()
H A Dphy-core.c133 case PHY_INTERFACE_MODE_5GBASER: in phy_interface_num_ports()
/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_port.c148 if (port->conf.portmode == PHY_INTERFACE_MODE_5GBASER) in sparx5_get_sfi_status()
176 case PHY_INTERFACE_MODE_5GBASER: in sparx5_get_port_status()
250 case PHY_INTERFACE_MODE_5GBASER: in sparx5_port_verify_speed()
791 u32 clk_spd = conf->portmode == PHY_INTERFACE_MODE_5GBASER ? 1 : 0; in sparx5_port_pcs_high_set()
H A Dsparx5_main.h562 return interface == PHY_INTERFACE_MODE_5GBASER || in sparx5_is_baser()
H A Dsparx5_main.c318 __set_bit(PHY_INTERFACE_MODE_5GBASER, in sparx5_create_port()
/linux/drivers/phy/marvell/
H A Dphy-mvebu-cp110-comphy.c225 ETH_CONF(2, 0, PHY_INTERFACE_MODE_5GBASER, 0x1, COMPHY_FW_MODE_XFI),
240 ETH_CONF(4, 0, PHY_INTERFACE_MODE_5GBASER, 0x2, COMPHY_FW_MODE_XFI),
248 ETH_CONF(4, 1, PHY_INTERFACE_MODE_5GBASER, 0x1, COMPHY_FW_MODE_XFI),
798 case PHY_INTERFACE_MODE_5GBASER: in mvebu_comphy_power_on()
/linux/drivers/net/dsa/mv88e6xxx/
H A Dpcs-639x.c417 case PHY_INTERFACE_MODE_5GBASER: in mv88e639x_xg_pcs_get_state()
461 case PHY_INTERFACE_MODE_5GBASER: in mv88e639x_pcs_select()
H A Dport.c555 case PHY_INTERFACE_MODE_5GBASER: in mv88e6xxx_port_set_cmode()
H A Dchip.c828 __set_bit(PHY_INTERFACE_MODE_5GBASER, supported); in mv88e6393x_phylink_get_caps()
/linux/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_main.c1516 interface == PHY_INTERFACE_MODE_5GBASER || in mvpp2_is_xlg()
1668 case PHY_INTERFACE_MODE_5GBASER: in mvpp22_gop_init()
2228 case PHY_INTERFACE_MODE_5GBASER: in mvpp22_pcs_reset_deassert()
6209 if (port->phy_interface == PHY_INTERFACE_MODE_5GBASER) in mvpp2_xlg_pcs_get_state()
6975 __set_bit(PHY_INTERFACE_MODE_5GBASER, in mvpp2_port_probe()
6981 } else if (phy_mode == PHY_INTERFACE_MODE_5GBASER) { in mvpp2_port_probe()
6982 __set_bit(PHY_INTERFACE_MODE_5GBASER, in mvpp2_port_probe()
6995 else if (phy_mode == PHY_INTERFACE_MODE_5GBASER) in mvpp2_port_probe()
/linux/drivers/net/phy/aquantia/
H A Daquantia_main.c684 interface = PHY_INTERFACE_MODE_5GBASER; in aqr107_fill_interface_modes()
/linux/Documentation/networking/
H A Dphy.rst275 ``PHY_INTERFACE_MODE_5GBASER``