Searched refs:PHY_CTRL1 (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/phy/freescale/ |
| H A D | phy-fsl-imx8mq-usb.c | 28 #define PHY_CTRL1 0x4 macro
553 value = readl(imx_phy->base + PHY_CTRL1); in imx8mq_usb_phy_init()
557 writel(value, imx_phy->base + PHY_CTRL1); in imx8mq_usb_phy_init()
567 value = readl(imx_phy->base + PHY_CTRL1); in imx8mq_usb_phy_init()
569 writel(value, imx_phy->base + PHY_CTRL1); in imx8mq_usb_phy_init()
591 value = readl(imx_phy->base + PHY_CTRL1); in imx8mp_usb_phy_init()
594 writel(value, imx_phy->base + PHY_CTRL1); in imx8mp_usb_phy_init()
609 value = readl(imx_phy->base + PHY_CTRL1); in imx8mp_usb_phy_init()
611 writel(value, imx_phy->base + PHY_CTRL1); in imx8mp_usb_phy_init()
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| /linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-usb-ss.c | 21 #define PHY_CTRL1 0x70 macro
55 qcom_ssphy_updatel(priv->base + PHY_CTRL1, PHY_RESET, in qcom_ssphy_do_reset()
58 qcom_ssphy_updatel(priv->base + PHY_CTRL1, PHY_RESET, 0); in qcom_ssphy_do_reset()
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| /linux/drivers/mmc/host/ |
| H A D | sdhci_am654.c | 30 #define PHY_CTRL1 0x100 macro
230 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, mask, val); in sdhci_am654_setup_dll()
233 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, in sdhci_am654_setup_dll()
265 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0); in sdhci_am654_setup_delay_chain()
283 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0); in sdhci_am654_set_clock()
798 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_init()
811 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_init()
1063 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_restore()
1076 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_restore()
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