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Searched refs:PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21902 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h36722 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h40535 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43988 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h35315 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h35336 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h45205 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h43306 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h46298 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h47501 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h43303 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h49535 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49956 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h40514 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_sh_mask.h51770 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddpcs_4_2_0_sh_mask.h4221 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddpcs_4_2_2_sh_mask.h4342 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro
H A Ddpcs_4_2_3_sh_mask.h4371 #define PHY_AUX_CNTL__AUX5_PAD_RXSEL__SHIFT … macro