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Searched refs:PHYCLKPerState (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h250 double PHYCLKPerState,
H A Ddisplay_mode_vba_32.c2088 mode_lib->vba.PHYCLKPerState[i], in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h603 double PHYCLKPerState[DC__VOLTAGE_STATES]; member
H A Ddisplay_mode_vba.c398 mode_lib->vba.PHYCLKPerState[i] = soc->clock_limits[i].phyclk_mhz; in fetch_socbb_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c4294 dml_min(600.0, v->PHYCLKPerState[i]) * 10,
4455 if (v->PHYCLKPerState[i] >= 270.0) {
4475 if (v->Outbpp == BPP_INVALID && v->PHYCLKPerState[i] >= 540.0) {
4495 if (v->Outbpp == BPP_INVALID && v->PHYCLKPerState[i] >= 810.0) {