Searched refs:PHYCLKPerState (Results 1 – 5 of 5) sorted by relevance
250 double PHYCLKPerState,
2088 mode_lib->vba.PHYCLKPerState[i], in dml32_ModeSupportAndSystemConfigurationFull()
603 double PHYCLKPerState[DC__VOLTAGE_STATES]; member
398 mode_lib->vba.PHYCLKPerState[i] = soc->clock_limits[i].phyclk_mhz; in fetch_socbb_params()
4294 dml_min(600.0, v->PHYCLKPerState[i]) * 10,4455 if (v->PHYCLKPerState[i] >= 270.0) {4475 if (v->Outbpp == BPP_INVALID && v->PHYCLKPerState[i] >= 540.0) {4495 if (v->Outbpp == BPP_INVALID && v->PHYCLKPerState[i] >= 810.0) {