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Searched refs:PHYCLKD32PerState (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h252 double PHYCLKD32PerState,
H A Ddisplay_mode_vba_util_32.c1339 double PHYCLKD32PerState, in dml32_CalculateOutputLink() argument
1404 PHYCLKD32PerState >= 10000.0 / 32) { in dml32_CalculateOutputLink()
1410 if (*OutBpp == 0 && PHYCLKD32PerState < 13500.0 / 32 && DSCEnable == true && in dml32_CalculateOutputLink()
1426 *OutBpp == 0 && PHYCLKD32PerState >= 13500.0 / 32) { in dml32_CalculateOutputLink()
1433 if (*OutBpp == 0 && PHYCLKD32PerState < 20000 / 32 && DSCEnable == true && in dml32_CalculateOutputLink()
1449 *OutBpp == 0 && PHYCLKD32PerState >= 20000 / 32) { in dml32_CalculateOutputLink()
H A Ddisplay_mode_vba_32.c2090 mode_lib->vba.PHYCLKD32PerState[i], in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h610 double PHYCLKD32PerState[DC__VOLTAGE_STATES]; member
H A Ddisplay_mode_vba.c400 mode_lib->vba.PHYCLKD32PerState[i] = soc->clock_limits[i].phyclk_d32_mhz; in fetch_socbb_params()
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddisplay_mode_core.c76 dml_float_t PHYCLKD32PerState,
5342 dml_float_t PHYCLKD32PerState, in CalculateOutputLink() argument
5407 …ate == dml_dp_rate_na || OutputLinkDPRate == dml_dp_rate_uhbr10) && PHYCLKD32PerState >= 10000 / 3… in CalculateOutputLink()
5410 …if (*OutBpp == 0 && PHYCLKD32PerState < 13500 / 32.0 && DSCEnable == dml_dsc_enable_if_necessary &… in CalculateOutputLink()
5420 …_na || OutputLinkDPRate == dml_dp_rate_uhbr13p5) && *OutBpp == 0 && PHYCLKD32PerState >= 13500 / 3… in CalculateOutputLink()
5424 …if (*OutBpp == 0 && PHYCLKD32PerState < 20000 / 32 && DSCEnable == dml_dsc_enable_if_necessary && … in CalculateOutputLink()
5434 …te_na || OutputLinkDPRate == dml_dp_rate_uhbr20) && *OutBpp == 0 && PHYCLKD32PerState >= 20000 / 3… in CalculateOutputLink()