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Searched refs:PHASE (Results 1 – 10 of 10) sorted by relevance

/linux/sound/firewire/
H A DKconfig121 * TerraTec PHASE 24 FW/PHASE X24 FW/PHASE 88 Rack FW
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clock_source.c989 REG_WRITE(PHASE[inst], e->target_pixel_rate_khz * e->mult_factor); in dcn31_program_pix_clk()
993 REG_WRITE(PHASE[inst], pll_settings->actual_pix_clk_100hz * 100); in dcn31_program_pix_clk()
1203 clock_hz = REG_READ(PHASE[inst]); in get_pixel_clk_frequency_100hz()
1313 REG_WRITE(PHASE[inst], pixel_clk); in dcn20_override_dp_pix_clk()
1343 REG_WRITE(PHASE[inst], e->target_pixel_rate_khz * e->mult_factor); in dcn3_program_pix_clk()
1347 REG_WRITE(PHASE[inst], pll_settings->actual_pix_clk_100hz * 100); in dcn3_program_pix_clk()
/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dhead917d.c44 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head917d_dither()
H A Dheadc37d.c100 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in headc37d_dither()
H A Dhead907d.c91 NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head907d_dither()
H A Dhead507d.c62 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head507d_dither()
/linux/drivers/scsi/
H A DFlashPoint.c499 #define PHASE BIT(13) macro
1806 && !((RDW_HARPOON((ioport + hp_intstat)) & PHASE) in FlashPoint_HandleInterrupt()
1833 (PROG_HLT | RSEL | PHASE | BUS_FREE)); in FlashPoint_HandleInterrupt()
1869 (PHASE | IUNKWN | PROG_HLT)); in FlashPoint_HandleInterrupt()
2057 (PROG_HLT | TIMEOUT | SEL | BUS_FREE | PHASE | in FPT_SccbMgr_bad_isr()
2644 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_sres()
2649 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_sres()
2722 (PHASE | RESET)) in FPT_sres()
2804 while (!(RDW_HARPOON((port + hp_intstat)) & (PHASE | RESET)) && in FPT_sres()
2814 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_SendMsg()
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/linux/Documentation/networking/
H A Dcan.rst1241 [ tq TQ prop-seg PROP_SEG phase-seg1 PHASE-SEG1
1242 phase-seg2 PHASE-SEG2 [ sjw SJW ] ]
1245 [ dtq TQ dprop-seg PROP_SEG dphase-seg1 PHASE-SEG1
1246 dphase-seg2 PHASE-SEG2 [ dsjw SJW ] ]
1265 PHASE-SEG1 := { 1..8 }
1266 PHASE-SEG2 := { 1..8 }
/linux/Documentation/scsi/
H A Dsym53c8xx_2.rst141 LOAD/STORE and handles PHASE MISMATCH from SCRIPTS for devices that
H A Dncr53c8xx.rst1233 have detected an expected disconnection (BUS FREE PHASE). For this process