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Searched refs:PCW_CHG_BIT (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-pll.c26 #define PCW_CHG_BIT 31 macro
118 BIT(pll->data->pcw_chg_bit ? : PCW_CHG_BIT); in mtk_pll_set_rate_regs()