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Searched refs:PCLK_DDR (Results 1 – 11 of 11) sorted by relevance

/linux/include/dt-bindings/clock/
H A Drk3308-cru.h170 #define PCLK_DDR 191 macro
H A Drk3328-cru.h160 #define PCLK_DDR 229 macro
H A Dpx30-cru.h144 #define PCLK_DDR 321 macro
H A Drk3399-cru.h271 #define PCLK_DDR 376 macro
/linux/drivers/clk/rockchip/
H A Dclk-rk3328.c330 COMPOSITE(PCLK_DDR, "pclk_ddr", mux_2plls_hdmiphy_p, 0,
H A Dclk-rk3308.c321 GATE(PCLK_DDR, "pclk_ddr", "pclk_bus", CLK_IGNORE_UNUSED,
H A Dclk-px30.c363 COMPOSITE_NOMUX(PCLK_DDR, "pclk_ddr", "gpll", CLK_IGNORE_UNUSED,
H A Dclk-rk3399.c670 COMPOSITE(PCLK_DDR, "pclk_ddr", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-scarlet.dtsi377 <&cru PCLK_DDR>,
H A Drk3399-gru.dtsi361 <&cru PCLK_DDR>;
H A Drk3399-base.dtsi1583 <&cru PCLK_DDR>,