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Searched refs:PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dnbio_v2_3.c359 data |= NAVI10_PCIE__LC_L0S_INACTIVITY_DEFAULT << PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT; in nbio_v2_3_enable_aspm()
479 data |= NAVI10_PCIE__LC_L0S_INACTIVITY_DEFAULT << PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT; in nbio_v2_3_program_aspm()
H A Dnbif_v6_3_1.c423 data |= 0x0 << PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT; in nbif_v6_3_1_program_aspm()
H A Dnbio_v4_3.c462 data |= 0x0 << PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT; in nbio_v4_3_program_aspm()
/linux/drivers/gpu/drm/amd/include/asic_reg/pcie/
H A Dpcie_6_1_0_sh_mask.h592 #define PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT macro
/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7051 #define PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT 0x00000008 macro
H A Dbif_4_1_sh_mask.h3010 #define PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT 0x8 macro
H A Dbif_5_0_sh_mask.h10742 #define PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT 0x8 macro
H A Dbif_5_1_sh_mask.h3964 #define PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT 0x8 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h42564 #define PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT macro
H A Dnbio_4_3_0_sh_mask.h31459 #define PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT macro
H A Dnbio_2_3_sh_mask.h53707 #define PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT macro
H A Dnbio_6_1_sh_mask.h37924 #define PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT macro