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Searched refs:PCIEP_PORT_CNTL__NATIVE_PME_EN_MASK (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/pcie/
H A Dpcie_6_1_0_sh_mask.h366 #define PCIEP_PORT_CNTL__NATIVE_PME_EN_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7544 #define PCIEP_PORT_CNTL__NATIVE_PME_EN_MASK 0x00000008L macro
H A Dbif_4_1_sh_mask.h2753 #define PCIEP_PORT_CNTL__NATIVE_PME_EN_MASK 0x8 macro
H A Dbif_5_0_sh_mask.h10433 #define PCIEP_PORT_CNTL__NATIVE_PME_EN_MASK 0x8 macro
H A Dbif_5_1_sh_mask.h3707 #define PCIEP_PORT_CNTL__NATIVE_PME_EN_MASK 0x8 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h42209 #define PCIEP_PORT_CNTL__NATIVE_PME_EN_MASK … macro
H A Dnbio_4_3_0_sh_mask.h31245 #define PCIEP_PORT_CNTL__NATIVE_PME_EN_MASK … macro
H A Dnbio_2_3_sh_mask.h53339 #define PCIEP_PORT_CNTL__NATIVE_PME_EN_MASK … macro
H A Dnbio_6_1_sh_mask.h37591 #define PCIEP_PORT_CNTL__NATIVE_PME_EN_MASK … macro