Home
last modified time | relevance | path

Searched refs:PCIE0_BASE__INST0_SEG5 (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/
H A Dbeige_goby_ip_offset.h983 #define PCIE0_BASE__INST0_SEG5 0x04040000 macro
H A Dvangogh_ip_offset.h1183 #define PCIE0_BASE__INST0_SEG5 0x04040000 macro
H A Darct_ip_offset.h865 #define PCIE0_BASE__INST0_SEG5 0 macro
H A Daldebaran_ip_offset.h1155 #define PCIE0_BASE__INST0_SEG5 0 macro