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Searched refs:PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h6379 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 0x0000000c macro
H A Dgfx_7_2_sh_mask.h6570 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 0xc macro
H A Dgfx_8_1_sh_mask.h7894 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 0xc macro
H A Dgfx_8_0_sh_mask.h7358 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 0xc macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1950 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT … macro
H A Dgc_9_1_sh_mask.h1808 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1805 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h15332 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h20136 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h24095 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h31855 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h7518 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h26441 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT … macro