Home
last modified time | relevance | path

Searched refs:PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h6375 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT 0x0000000a macro
H A Dgfx_7_2_sh_mask.h6566 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT 0xa macro
H A Dgfx_8_1_sh_mask.h7890 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT 0xa macro
H A Dgfx_8_0_sh_mask.h7354 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT 0xa macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1948 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT … macro
H A Dgc_9_1_sh_mask.h1806 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1803 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h15330 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h20134 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h24093 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h31853 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h7516 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h26439 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h7839 #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_PRIM__SHIFT … macro