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Searched refs:PA_SC_ENHANCE_1__FLUSH_ON_BINNING_TRANSITION__SHIFT (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_sh_mask.h1881 #define PA_SC_ENHANCE_1__FLUSH_ON_BINNING_TRANSITION__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h15407 #define PA_SC_ENHANCE_1__FLUSH_ON_BINNING_TRANSITION__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h20208 #define PA_SC_ENHANCE_1__FLUSH_ON_BINNING_TRANSITION__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h24167 #define PA_SC_ENHANCE_1__FLUSH_ON_BINNING_TRANSITION__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h31928 #define PA_SC_ENHANCE_1__FLUSH_ON_BINNING_TRANSITION__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h7592 #define PA_SC_ENHANCE_1__FLUSH_ON_BINNING_TRANSITION__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h26514 #define PA_SC_ENHANCE_1__FLUSH_ON_BINNING_TRANSITION__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h7914 #define PA_SC_ENHANCE_1__FLUSH_ON_BINNING_TRANSITION__SHIFT … macro