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Searched refs:OutputBpp (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h313 double OutputBpp,
323 double OutputBpp,
H A Ddisplay_mode_vba_util_32.c1691 double OutputBpp, in dml32_RequiredDTBCLK() argument
1705 return dml_max(PixelClock / 4.0 * OutputBpp / 24.0, 25.0); in dml32_RequiredDTBCLK()
1708 HCActive = dml_ceil(DSCSlices * dml_ceil(OutputBpp * in dml32_RequiredDTBCLK()
1720 double OutputBpp, in dml32_DSCDelayRequirement() argument
1732 if (DSCEnabled == true && OutputBpp != 0) { in dml32_DSCDelayRequirement()
1734 DSCDelayRequirement_val = 4 * (dml32_dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, in dml32_DSCDelayRequirement()
1738 DSCDelayRequirement_val = 2 * (dml32_dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, in dml32_DSCDelayRequirement()
1742 DSCDelayRequirement_val = dml32_dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, in dml32_DSCDelayRequirement()
1758 dml_print("DML::%s: OutputBpp = %f\n", __func__, OutputBpp); in dml32_DSCDelayRequirement()
H A Ddisplay_mode_vba_32.c3750 mode_lib->vba.OutputBpp[k] = mode_lib->vba.OutputBppPerState[mode_lib->vba.VoltageLevel][k]; in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_translation_helper.c842 out->OutputBpp[location] = (dml_float_t)output_bpc * 3; in populate_dml_output_cfg_from_stream_state()
846 out->OutputBpp[location] = (output_bpc * 3.0) / 2; in populate_dml_output_cfg_from_stream_state()
853 out->OutputBpp[location] = (dml_float_t)output_bpc * 2; in populate_dml_output_cfg_from_stream_state()
857 out->OutputBpp[location] = (dml_float_t)output_bpc * 3; in populate_dml_output_cfg_from_stream_state()
862 out->OutputBpp[location] = in->timing.dsc_cfg.bits_per_pixel / 16.0; in populate_dml_output_cfg_from_stream_state()
H A Ddml2_utils.c123 dml_output_array->OutputBpp[dst_index] = dml_output_array->OutputBpp[src_index]; in dml2_util_copy_dml_output()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c4456 double OutputBpp, in RequiredDTBCLK() argument
4464 return math_max2(PixelClock / 4.0 * OutputBpp / 24.0, 25.0); in RequiredDTBCLK()
4467 …double HCActive = math_ceil2(DSCSlices * math_ceil2(OutputBpp * math_ceil2(HActive / DSCSlices, 1)… in RequiredDTBCLK()
4479 double OutputBpp, in DSCDelayRequirement() argument
4491 if (DSCEnabled == true && OutputBpp != 0) { in DSCDelayRequirement()
4500 …= NumberOfDSCSlicesFactor * (dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, (unsigned int)(… in DSCDelayRequirement()
4512 DML_LOG_VERBOSE("DML::%s: OutputBpp = %f\n", __func__, OutputBpp); in DSCDelayRequirement()
7937 get_stream_output_bpp(s->OutputBpp, display_cfg); in dml_core_mode_support()
8426 s->OutputBpp[k], in dml_core_mode_support()
8440 &mode_lib->ms.OutputBpp[k], in dml_core_mode_support()
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/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h507 double OutputBpp[DC__NUM_DPP__MAX]; member
H A Ddisplay_mode_vba.c627 mode_lib->vba.OutputBpp[mode_lib->vba.NumberOfActivePlanes] = in fetch_pipe_params()