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Searched refs:OutputBpp (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_shared_types.h279 double OutputBpp[DML2_MAX_PLANES]; member
472 double OutputBpp[DML2_MAX_PLANES]; member
872 double OutputBpp[DML2_MAX_PLANES]; member
968 double OutputBpp[DML2_MAX_PLANES]; member
H A Ddml2_core_shared.c431 double OutputBpp,
441 double OutputBpp,
769 get_stream_output_bpp(s->OutputBpp, display_cfg); in dml2_core_shared_mode_support()
1257 s->OutputBpp[k], in dml2_core_shared_mode_support()
1271 &mode_lib->ms.OutputBpp[k], in dml2_core_shared_mode_support()
1409 …iptors[k].stream_index].output.output_encoder == dml2_hdmifrl) && mode_lib->ms.OutputBpp[k] == 0) { in dml2_core_shared_mode_support()
1430 …riptors[k].stream_index].timing.dsc.enable == dml2_dsc_enable_if_necessary && s->OutputBpp[k] != 0) in dml2_core_shared_mode_support()
1484 mode_lib->ms.OutputBpp[k], in dml2_core_shared_mode_support()
1572 mode_lib->ms.OutputBpp[k], in dml2_core_shared_mode_support()
2825 mode_lib->ms.support.OutputBpp[k] = mode_lib->ms.OutputBpp[k]; in dml2_core_shared_mode_support()
[all …]
H A Ddml2_core_dcn4_calcs.c4423 double OutputBpp, in RequiredDTBCLK() argument
4431 return math_max2(PixelClock / 4.0 * OutputBpp / 24.0, 25.0); in RequiredDTBCLK()
4434 …double HCActive = math_ceil2(DSCSlices * math_ceil2(OutputBpp * math_ceil2(HActive / DSCSlices, 1)… in RequiredDTBCLK()
4446 double OutputBpp, in DSCDelayRequirement() argument
4458 if (DSCEnabled == true && OutputBpp != 0) { in DSCDelayRequirement()
4467 …= NumberOfDSCSlicesFactor * (dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, (unsigned int)(… in DSCDelayRequirement()
4479 dml2_printf("DML::%s: OutputBpp = %f\n", __func__, OutputBpp); in DSCDelayRequirement()
7043 get_stream_output_bpp(s->OutputBpp, display_cfg); in dml_core_mode_support()
7540 s->OutputBpp[k], in dml_core_mode_support()
7554 &mode_lib->ms.OutputBpp[k], in dml_core_mode_support()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h313 double OutputBpp,
323 double OutputBpp,
H A Ddisplay_mode_vba_util_32.c1687 double OutputBpp, in dml32_RequiredDTBCLK() argument
1701 return dml_max(PixelClock / 4.0 * OutputBpp / 24.0, 25.0); in dml32_RequiredDTBCLK()
1704 HCActive = dml_ceil(DSCSlices * dml_ceil(OutputBpp * in dml32_RequiredDTBCLK()
1716 double OutputBpp, in dml32_DSCDelayRequirement() argument
1728 if (DSCEnabled == true && OutputBpp != 0) { in dml32_DSCDelayRequirement()
1730 DSCDelayRequirement_val = 4 * (dml32_dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, in dml32_DSCDelayRequirement()
1734 DSCDelayRequirement_val = 2 * (dml32_dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, in dml32_DSCDelayRequirement()
1738 DSCDelayRequirement_val = dml32_dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, in dml32_DSCDelayRequirement()
1754 dml_print("DML::%s: OutputBpp = %f\n", __func__, OutputBpp); in dml32_DSCDelayRequirement()
H A Ddisplay_mode_vba_32.c3750 mode_lib->vba.OutputBpp[k] = mode_lib->vba.OutputBppPerState[mode_lib->vba.VoltageLevel][k]; in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
H A Ddml_top_types.h358 double OutputBpp[DML2_MAX_PLANES]; member
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_translation_helper.c798 out->OutputBpp[location] = (dml_float_t)output_bpc * 3; in populate_dml_output_cfg_from_stream_state()
802 out->OutputBpp[location] = (output_bpc * 3.0) / 2; in populate_dml_output_cfg_from_stream_state()
809 out->OutputBpp[location] = (dml_float_t)output_bpc * 2; in populate_dml_output_cfg_from_stream_state()
813 out->OutputBpp[location] = (dml_float_t)output_bpc * 3; in populate_dml_output_cfg_from_stream_state()
818 out->OutputBpp[location] = in->timing.dsc_cfg.bits_per_pixel / 16.0; in populate_dml_output_cfg_from_stream_state()
H A Ddml2_utils.c123 dml_output_array->OutputBpp[dst_index] = dml_output_array->OutputBpp[src_index]; in dml2_util_copy_dml_output()
H A Ddisplay_mode_core_structs.h569 …dml_float_t OutputBpp[__DML_NUM_PLANES__]; //< brief Use by mode_programming to specify a output b… member
741 dml_float_t OutputBpp[__DML_NUM_PLANES__]; member
H A Ddisplay_mode_core.c445 dml_float_t OutputBpp,
737 dml_float_t OutputBpp,
4577 dml_float_t OutputBpp, in RequiredDTBCLK() argument
4585 return dml_max(PixelClock / 4.0 * OutputBpp / 24.0, 25.0); in RequiredDTBCLK()
4588 …dml_float_t HCActive = dml_ceil(DSCSlices * dml_ceil(OutputBpp * dml_ceil(HActive / DSCSlices, 1) … in RequiredDTBCLK()
5872 dml_float_t OutputBpp, in DSCDelayRequirement() argument
5883 if (DSCEnabled == true && OutputBpp != 0) { in DSCDelayRequirement()
5885 …DSCDelayRequirement_val = dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, (dml_uint_t)(dml_c… in DSCDelayRequirement()
5888 …DSCDelayRequirement_val = dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, (dml_uint_t)(dml_c… in DSCDelayRequirement()
5891 …DSCDelayRequirement_val = dscceComputeDelay(DSCInputBitPerComponent, OutputBpp, (dml_uint_t)((dml_… in DSCDelayRequirement()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h507 double OutputBpp[DC__NUM_DPP__MAX]; member
H A Ddisplay_mode_vba.c627 mode_lib->vba.OutputBpp[mode_lib->vba.NumberOfActivePlanes] = in fetch_pipe_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20.c1805 double bpp = mode_lib->vba.OutputBpp[k]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5115 mode_lib->vba.OutputBpp[k] = in dml20_ModeSupportAndSystemConfigurationFull()
H A Ddisplay_mode_vba_20v2.c1841 double bpp = mode_lib->vba.OutputBpp[k]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5231 mode_lib->vba.OutputBpp[k] = in dml20v2_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c1797 double bpp = mode_lib->vba.OutputBpp[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5237 mode_lib->vba.OutputBpp[k] = in dml21_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c2272 double BPP = v->OutputBpp[k];
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c2254 double BPP = v->OutputBpp[k];