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Searched refs:OUT_RING (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gpu.c163 OUT_RING(ring, lower_32_bits(shadowptr(a6xx_gpu, ring))); in update_shadow_rptr()
164 OUT_RING(ring, upper_32_bits(shadowptr(a6xx_gpu, ring))); in update_shadow_rptr()
211 OUT_RING(ring, 0x00); in a6xx_flush_yield()
212 OUT_RING(ring, 0x00); in a6xx_flush_yield()
214 OUT_RING(ring, 0x01); in a6xx_flush_yield()
216 OUT_RING(ring, 0x00); in a6xx_flush_yield()
226 OUT_RING(ring, CP_REG_TO_MEM_0_REG(counter) | in get_stats_counter()
229 OUT_RING(ring, lower_32_bits(iova)); in get_stats_counter()
230 OUT_RING(ring, upper_32_bits(iova)); in get_stats_counter()
253 OUT_RING(ring, 0); in a6xx_set_pagetable()
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H A Da3xx_gpu.c50 OUT_RING(ring, lower_32_bits(submit->cmd[i].iova)); in a3xx_submit()
51 OUT_RING(ring, submit->cmd[i].size); in a3xx_submit()
58 OUT_RING(ring, submit->seqno); in a3xx_submit()
65 OUT_RING(ring, HLSQ_FLUSH); in a3xx_submit()
69 OUT_RING(ring, 0x00000000); in a3xx_submit()
73 OUT_RING(ring, CACHE_FLUSH_TS | CP_EVENT_WRITE_0_IRQ); in a3xx_submit()
74 OUT_RING(ring, rbmemptr(ring, fence)); in a3xx_submit()
75 OUT_RING(ring, submit->seqno); in a3xx_submit()
80 OUT_RING(ring, CP_REG(REG_A3XX_HLSQ_CL_KERNEL_GROUP_X_REG)); in a3xx_submit()
81 OUT_RING(ring, 0x00000000); in a3xx_submit()
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H A Da5xx_gpu.c28 OUT_RING(ring, lower_32_bits(shadowptr(a5xx_gpu, ring))); in update_shadow_rptr()
29 OUT_RING(ring, upper_32_bits(shadowptr(a5xx_gpu, ring))); in update_shadow_rptr()
105 OUT_RING(ring, ptr[i]); in a5xx_submit_in_rb()
143 OUT_RING(ring, 0x02); in a5xx_submit()
147 OUT_RING(ring, 0); in a5xx_submit()
151 OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[submit->ring->id])); in a5xx_submit()
152 OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[submit->ring->id])); in a5xx_submit()
156 OUT_RING(ring, 1); in a5xx_submit()
164 OUT_RING(ring, 0x0); in a5xx_submit()
168 OUT_RING(ring, 0x02); in a5xx_submit()
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H A Da8xx_gpu.c484 OUT_RING(ring, 0); in a8xx_preempt_start()
502 OUT_RING(ring, BIT(27)); in a8xx_cp_init()
521 OUT_RING(ring, mask); in a8xx_cp_init()
524 OUT_RING(ring, 0x00000003); in a8xx_cp_init()
527 OUT_RING(ring, 0x20000000); in a8xx_cp_init()
530 OUT_RING(ring, 0x00000002); in a8xx_cp_init()
533 OUT_RING(ring, lower_32_bits(a6xx_gpu->pwrup_reglist_iova)); in a8xx_cp_init()
535 OUT_RING(ring, upper_32_bits(a6xx_gpu->pwrup_reglist_iova)); in a8xx_cp_init()
538 OUT_RING(ring, BIT(31)); in a8xx_cp_init()
796 OUT_RING(gpu->rb[0], 0x00000000); in hw_init()
H A Dadreno_gpu.h684 OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF)); in OUT_PKT0()
692 OUT_RING(ring, CP_TYPE2_PKT); in OUT_PKT2()
699 OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8)); in OUT_PKT3()
721 OUT_RING(ring, PKT4(regindx, cnt)); in OUT_PKT4()
732 OUT_RING(ring, PKT7(opcode, cnt)); in OUT_PKT7()
/linux/drivers/gpu/drm/msm/
H A Dmsm_ringbuffer.h133 OUT_RING(struct msm_ringbuffer *ring, uint32_t data) in OUT_RING() function