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Searched refs:OTG_H_TIMING_DIV_MODE (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/optc/dcn401/
H A Ddcn401_optc.c125 OTG_H_TIMING_DIV_MODE, H_TIMING_DIV_BY2); in optc401_set_odm_combine()
144 OTG_H_TIMING_DIV_MODE, H_TIMING_DIV_BY4); in optc401_set_odm_combine()
156 OTG_H_TIMING_DIV_MODE, H_TIMING_DIV_BY4); in optc401_set_odm_combine()
278 OTG_H_TIMING_DIV_MODE, h_div); in optc401_set_odm_bypass()
H A Ddcn401_optc.h155 SF(OTG0_OTG_H_TIMING_CNTL, OTG_H_TIMING_DIV_MODE, mask_sh),\
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn314/
H A Ddcn314_optc.c101 OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc314_set_odm_combine()
179 OTG_H_TIMING_DIV_MODE, h_div); in optc314_set_odm_bypass()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn31/
H A Ddcn31_optc.c88 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc31_set_odm_combine()
241 OTG_H_TIMING_DIV_MODE, 0); in optc3_init_odm()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn35/
H A Ddcn35_optc.c108 REG_UPDATE(OTG_H_TIMING_CNTL, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc35_set_odm_combine()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/
H A Ddcn10_optc.c319 if (optc1->tg_mask->OTG_H_TIMING_DIV_MODE != 0) { in optc1_program_timing()
324 OTG_H_TIMING_DIV_MODE, h_div); in optc1_program_timing()
H A Ddcn10_optc.h578 type OTG_H_TIMING_DIV_MODE;\
/linux/drivers/gpu/drm/amd/include/
H A Dsoc24_enum.h4332 typedef enum OTG_H_TIMING_DIV_MODE { enum
4337 } OTG_H_TIMING_DIV_MODE; typedef
H A Dsoc21_enum.h4314 typedef enum OTG_H_TIMING_DIV_MODE { enum
4319 } OTG_H_TIMING_DIV_MODE; typedef