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Searched refs:OTG_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/optc/dcn20/
H A Ddcn20_optc.c69 REG_UPDATE_2(OTG_CONTROL, in optc2_enable_crtc()
275 REG_UPDATE(OTG_CONTROL, OTG_MASTER_EN, 0); in optc2_align_vblanks()
277 REG_WAIT(OTG_CONTROL, in optc2_align_vblanks()
334 REG_UPDATE(OTG_CONTROL, in optc2_align_vblanks()
351 REG_WAIT(OTG_CONTROL, in optc2_align_vblanks()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn314/
H A Ddcn314_optc.c120 REG_UPDATE_2(OTG_CONTROL, in optc314_enable_crtc()
138 REG_UPDATE(OTG_CONTROL, in optc314_disable_crtc()
157 REG_UPDATE_2(OTG_CONTROL, OTG_DISABLE_POINT_CNTL, 0, OTG_MASTER_EN, 0); in optc314_phantom_crtc_post_enable()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn401/
H A Ddcn401_optc.c195 REG_UPDATE_2(OTG_CONTROL, in optc401_enable_crtc()
223 REG_UPDATE(OTG_CONTROL, in optc401_disable_crtc()
242 REG_UPDATE_2(OTG_CONTROL, OTG_DISABLE_POINT_CNTL, 0, OTG_MASTER_EN, 0); in optc401_phantom_crtc_post_enable()
259 REG_UPDATE(OTG_CONTROL, OTG_MASTER_EN, 0); in optc401_disable_phantom_otg()
376 REG_UPDATE(OTG_CONTROL, OTG_OUT_MUX, dest); in optc401_set_out_mux()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn31/
H A Ddcn31_optc.c110 REG_UPDATE_2(OTG_CONTROL, in optc31_enable_crtc()
138 REG_UPDATE(OTG_CONTROL, in optc31_disable_crtc()
159 REG_UPDATE_2(OTG_CONTROL, in optc31_immediate_disable_crtc()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn35/
H A Ddcn35_optc.c127 REG_UPDATE_2(OTG_CONTROL, in optc35_enable_crtc()
155 REG_UPDATE(OTG_CONTROL, in optc35_disable_crtc()
175 REG_UPDATE_2(OTG_CONTROL, OTG_DISABLE_POINT_CNTL, 0, OTG_MASTER_EN, 0); in optc35_phantom_crtc_post_enable()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/
H A Ddcn10_optc.c282 REG_UPDATE_2(OTG_CONTROL, in optc1_program_timing()
544 REG_UPDATE_2(OTG_CONTROL, in optc1_enable_crtc()
562 REG_UPDATE_2(OTG_CONTROL, in optc1_disable_crtc()
1334 REG_GET(OTG_CONTROL, in optc1_read_otg_state()
1408 REG_GET(OTG_CONTROL, in optc1_get_otg_active_size()
1446 REG_GET(OTG_CONTROL, OTG_MASTER_EN, &otg_enabled); in optc1_is_tg_enabled()
H A Ddcn10_optc.h52 SRI(OTG_CONTROL, OTG, inst),\
130 uint32_t OTG_CONTROL; member
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.h237 SRI_ARR(OTG_CONTROL, OTG, inst),\
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h1011 SRI_ARR(OTG_CONTROL, OTG, inst), SRI_ARR(OTG_STEREO_CONTROL, OTG, inst), \