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Searched refs:OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h26214 #define OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h27544 #define OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h23679 #define OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h23700 #define OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h32507 #define OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h33271 #define OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h34382 #define OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h29602 #define OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h33149 #define OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h27568 #define OTG3_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro