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Searched refs:OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h23416 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h24877 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h26253 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h29331 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h22561 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h22582 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h31192 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h29157 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h31956 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h33091 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h28265 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h32674 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h31813 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h26277 #define OTG2_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro