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Searched refs:OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h23412 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h24873 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h26249 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h29327 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h22558 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h22579 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h31188 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h29153 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h31952 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h33087 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h28261 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h32670 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h31809 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h26273 #define OTG2_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro