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Searched refs:OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h23332 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h24808 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h26184 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h29246 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h22504 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h22525 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h31123 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h29088 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h31887 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h33022 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h28196 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h32588 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h31744 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h26208 #define OTG2_OTG_CONTROL__OTG_FIELD_NUMBER_CNTL__SHIFT … macro