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Searched refs:OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h15057 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_0_3_sh_mask.h15236 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_1_0_sh_mask.h22450 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_0_1_sh_mask.h23921 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_2_1_sh_mask.h25320 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_2_1_0_sh_mask.h28343 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_5_1_sh_mask.h21772 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_5_0_sh_mask.h21793 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_1_2_sh_mask.h30248 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_1_5_sh_mask.h28242 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_1_6_sh_mask.h31012 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_1_4_sh_mask.h32158 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_0_2_sh_mask.h27309 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h31688 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_0_0_sh_mask.h30858 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_2_0_sh_mask.h25344 #define OTG1_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro