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Searched refs:OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h15158 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_0_3_sh_mask.h15329 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_1_0_sh_mask.h22565 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h24014 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_2_1_sh_mask.h25413 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h28456 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_5_1_sh_mask.h21845 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_5_0_sh_mask.h21866 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h30341 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h28335 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h31105 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h32251 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h27402 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h31803 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h30951 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro
H A Ddcn_3_2_0_sh_mask.h25437 #define OTG1_OTG_STATUS__OTG_V_SYNC_A__SHIFT macro