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Searched refs:OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h15163 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_0_3_sh_mask.h15334 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_1_0_sh_mask.h22570 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h24019 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_2_1_sh_mask.h25418 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h28461 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_5_1_sh_mask.h21850 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_5_0_sh_mask.h21871 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h30346 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h28340 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h31110 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h32256 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h27407 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h31808 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h30956 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_2_0_sh_mask.h25442 #define OTG1_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro