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Searched refs:OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h15877 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h24562 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h25938 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h22307 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h22328 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h30879 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h28844 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h31643 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h32776 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h27950 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h31499 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h25962 #define OTG1_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro