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Searched refs:OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h15687 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_0_3_sh_mask.h15864 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_1_0_sh_mask.h23122 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_0_1_sh_mask.h24549 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_2_1_sh_mask.h25925 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_2_1_0_sh_mask.h29011 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_5_1_sh_mask.h22296 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_5_0_sh_mask.h22317 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_1_2_sh_mask.h30866 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_1_5_sh_mask.h28831 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_1_6_sh_mask.h31630 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_1_4_sh_mask.h32763 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_0_2_sh_mask.h27937 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h32352 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h31486 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro
H A Ddcn_3_2_0_sh_mask.h25949 #define OTG1_OTG_GLOBAL_CONTROL2__DCCG_VUPDATE_MODE_MASK … macro