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Searched refs:OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h14283 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_0_3_sh_mask.h14410 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_1_0_sh_mask.h21636 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_0_1_sh_mask.h23095 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_2_1_sh_mask.h24517 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_2_1_0_sh_mask.h27505 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_5_1_sh_mask.h21086 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_5_0_sh_mask.h21107 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_1_2_sh_mask.h29434 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_1_5_sh_mask.h27457 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_1_6_sh_mask.h30198 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_1_4_sh_mask.h31355 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_0_2_sh_mask.h26483 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h30854 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_0_0_sh_mask.h30033 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro
H A Ddcn_3_2_0_sh_mask.h24541 #define OTG0_OTG_TRIGA_CNTL__OTG_TRIGA_FREQUENCY_SELECT_MASK … macro