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Searched refs:OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h14387 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_0_3_sh_mask.h14508 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_1_0_sh_mask.h21756 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h23193 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_2_1_sh_mask.h24615 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h27623 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_5_1_sh_mask.h21164 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_5_0_sh_mask.h21185 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h29532 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h27555 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h30296 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h31453 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h26581 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h30974 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h30131 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro
H A Ddcn_3_2_0_sh_mask.h24639 #define OTG0_OTG_STATUS__OTG_H_SYNC_A__SHIFT macro