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Searched refs:OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h15051 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h23736 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h25135 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h21621 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h21642 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h30065 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h28059 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h30829 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h31973 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h27124 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h30674 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h25159 #define OTG0_OTG_GLOBAL_CONTROL4__DIG_UPDATE_VCOUNT_MODE__SHIFT … macro