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Searched refs:OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h14415 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h14536 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_1_0_sh_mask.h21784 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h23221 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h24643 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h27651 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h21186 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h21207 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h29560 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h27583 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h30324 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h31481 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h26609 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h31002 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h30159 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h24667 #define OTG0_OTG_COUNT_CONTROL__OTG_HORZ_REPETITION_COUNT__SHIFT … macro