1 /* Copyright 2012-15 Advanced Micro Devices, Inc. 2 * 3 * Permission is hereby granted, free of charge, to any person obtaining a 4 * copy of this software and associated documentation files (the "Software"), 5 * to deal in the Software without restriction, including without limitation 6 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 7 * and/or sell copies of the Software, and to permit persons to whom the 8 * Software is furnished to do so, subject to the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included in 11 * all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 19 * OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * Authors: AMD 22 * 23 */ 24 25 #ifndef __DC_OPP_DCN201_H__ 26 #define __DC_OPP_DCN201_H__ 27 28 #include "dcn20/dcn20_opp.h" 29 30 #define TO_DCN201_OPP(opp)\ 31 container_of(opp, struct dcn201_opp, base) 32 33 #define OPP_SF(reg_name, field_name, post_fix)\ 34 .field_name = reg_name ## __ ## field_name ## post_fix 35 36 #define OPP_REG_LIST_DCN201(id) \ 37 OPP_REG_LIST_DCN10(id), \ 38 OPP_DPG_REG_LIST(id), \ 39 SRI(FMT_422_CONTROL, FMT, id) 40 41 #define OPP_MASK_SH_LIST_DCN201(mask_sh) \ 42 OPP_MASK_SH_LIST_DCN20(mask_sh) 43 44 #define OPP_DCN201_REG_FIELD_LIST(type) \ 45 OPP_DCN20_REG_FIELD_LIST(type) 46 struct dcn201_opp_shift { 47 OPP_DCN201_REG_FIELD_LIST(uint8_t); 48 }; 49 50 struct dcn201_opp_mask { 51 OPP_DCN201_REG_FIELD_LIST(uint32_t); 52 }; 53 54 struct dcn201_opp_registers { 55 OPP_REG_VARIABLE_LIST_DCN2_0; 56 }; 57 58 struct dcn201_opp { 59 struct output_pixel_processor base; 60 const struct dcn201_opp_registers *regs; 61 const struct dcn201_opp_shift *opp_shift; 62 const struct dcn201_opp_mask *opp_mask; 63 bool is_write_to_ram_a_safe; 64 }; 65 66 void dcn201_opp_construct(struct dcn201_opp *oppn201, 67 struct dc_context *ctx, 68 uint32_t inst, 69 const struct dcn201_opp_registers *regs, 70 const struct dcn201_opp_shift *opp_shift, 71 const struct dcn201_opp_mask *opp_mask); 72 73 #endif 74