Searched refs:OP2 (Results 1 – 3 of 3) sorted by relevance
| /linux/arch/arm/kernel/ |
| H A D | hw_breakpoint.c | 49 #define READ_WB_REG_CASE(OP2, M, VAL) \ argument
50 case ((OP2 << 4) + M): \
51 ARM_DBG_READ(c0, c ## M, OP2, VAL); \
54 #define WRITE_WB_REG_CASE(OP2, M, VAL) \ argument
55 case ((OP2 << 4) + M): \
56 ARM_DBG_WRITE(c0, c ## M, OP2, VAL); \
59 #define GEN_READ_WB_REG_CASES(OP2, VAL) \ argument
60 READ_WB_REG_CASE(OP2, 0, VAL); \
61 READ_WB_REG_CASE(OP2, 1, VAL); \
62 READ_WB_REG_CASE(OP2, 2, VAL); \
[all …]
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| /linux/arch/arm/include/asm/ |
| H A D | hw_breakpoint.h | 110 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument
111 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\
114 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument
115 asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\
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| /linux/arch/sparc/net/ |
| H A D | bpf_jit_comp_32.c | 29 #define OP2(X) ((X) << 22) macro
33 #define F2(X, Y) (OP(X) | OP2(Y))
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