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Searched refs:ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h26341 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_3_2_1_sh_mask.h27666 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_2_1_0_sh_mask.h32477 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_3_5_1_sh_mask.h23780 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_3_5_0_sh_mask.h23801 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_3_1_2_sh_mask.h32634 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_3_1_5_sh_mask.h30500 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_3_1_6_sh_mask.h33398 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_3_1_4_sh_mask.h34504 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_3_0_2_sh_mask.h30555 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_2_0_0_sh_mask.h35802 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_3_0_0_sh_mask.h34925 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro
H A Ddcn_3_2_0_sh_mask.h27690 #define ODM_MEM_PWR_CTRL__ODM_MEM4_PWR_DIS_MASK … macro