Searched refs:ODMMode (Results 1 – 9 of 9) sorted by relevance
875 switch (disp_cfg->hw.ODMMode[cfg_idx]) { in get_target_odm_factor()1061 const unsigned int *ODMMode, *DPPPerSurface; in dml2_map_dc_pipes() local1081 ODMMode = (const unsigned int *)odm_mode_array; in dml2_map_dc_pipes()1085 ODMMode = (unsigned int *)disp_cfg->hw.ODMMode; in dml2_map_dc_pipes()1099 if (ODMMode[stream_disp_cfg_index] == dml_odm_mode_bypass) { in dml2_map_dc_pipes()1101 } else if (ODMMode[stream_disp_cfg_index] == dml_odm_mode_combine_2to1) { in dml2_map_dc_pipes()1103 } else if (ODMMode[stream_disp_cfg_index] == dml_odm_mode_combine_4to1) { in dml2_map_dc_pipes()1114 if (ODMMode[stream_disp_cfg_index] == 1) { in dml2_map_dc_pipes()1116 } else if (ODMMode[stream_disp_cfg_index] == 2) { in dml2_map_dc_pipes()1118 } else if (ODMMode[stream_disp_cfg_index] == 4) { in dml2_map_dc_pipes()
71 in_out_display_cfg->hw.ODMMode[i] = mode_support_info->ODMMode[i]; in map_hw_resources()248 if (planes_per_timing[i] > 1 && evaluation_info->ODMMode[i] != dml_odm_mode_bypass) in are_timings_requiring_odm_doing_blending()
470 enum dml_odm_mode ODMMode; member656 …enum dml_odm_mode ODMMode[__DML_NUM_PLANES__]; /// <brief ODM mode that is chosen in the mode chec… member792 …enum dml_odm_mode ODMMode[__DML_NUM_PLANES__]; /// <brief ODM mode that is chosen in the mode chec… member1495 enum dml_odm_mode *ODMMode; member
209 enum dml_odm_mode odm_mode = hw->ODMMode[plane_idx]; in dml_rq_dlg_get_dlg_reg()
137 enum dml2_odm_mode ODMMode; member301 …enum dml2_odm_mode ODMMode[DML2_MAX_PLANES]; /// <brief ODM mode that is chosen in the mode check … member589 enum dml2_odm_mode ODMMode[DML2_MAX_PLANES]; member716 enum dml2_odm_mode ODMMode[DML2_MAX_PLANES]; member1868 enum dml2_odm_mode *ODMMode; member2314 enum dml2_odm_mode *ODMMode; member
64 mode_lib->mp.ODMMode[k] = dml2_odm_mode_combine_4to1; in dcn5_mode_programming()67 mode_lib->mp.ODMMode[k] = dml2_odm_mode_combine_3to1; in dcn5_mode_programming()70 mode_lib->mp.ODMMode[k] = dml2_odm_mode_combine_2to1; in dcn5_mode_programming()74 mode_lib->mp.ODMMode[k] = dml2_odm_mode_mso_1to4; in dcn5_mode_programming()76 mode_lib->mp.ODMMode[k] = dml2_odm_mode_mso_1to2; in dcn5_mode_programming()78 mode_lib->mp.ODMMode[k] = dml2_odm_mode_bypass; in dcn5_mode_programming()196 mode_lib->mp.ODMMode, in dcn5_mode_programming()253 CalculateSwathAndDETConfiguration_params->ODMMode = mode_lib->mp.ODMMode; in dcn5_mode_programming()293 mode_lib->mp.ODMMode[k], in dcn5_mode_programming()661 myPipe->ODMMode = mode_lib->mp.ODMMode[k]; in dcn5_mode_programming()
234 if (p->ODMMode[plane_idx] == dml2_odm_mode_combine_4to1) in calculate_max_mem_size_per_plane_per_dpp()236 else if (p->ODMMode[plane_idx] == dml2_odm_mode_combine_3to1) in calculate_max_mem_size_per_plane_per_dpp()238 else if (p->ODMMode[plane_idx] == dml2_odm_mode_combine_2to1) in calculate_max_mem_size_per_plane_per_dpp()711 l->odm_mode = mode_lib->mp.ODMMode[l->plane_idx]; in dcn6_rq_dlg_get_dlg_reg()
249 enum dml2_odm_mode ODMMode[], in dcn5_calculate_swath_width() argument298 MainSurfaceODMMode = ODMMode[k]; in dcn5_calculate_swath_width()713 p->ODMMode, in dcn5_calculate_swath_and_det_configuration()2843 s->DISPCLKCycles += (p->myPipe->ODMMode != dml2_odm_mode_bypass ? 18 : 0); in dcn5_calculate_prefetch_schedule()2850 if (p->myPipe->ODMMode == dml2_odm_mode_split_1to2 || p->myPipe->ODMMode == dml2_odm_mode_mso_1to2) in dcn5_calculate_prefetch_schedule()2852 else if (p->myPipe->ODMMode == dml2_odm_mode_mso_1to4) in dcn5_calculate_prefetch_schedule()2864 DML_LOG_VERBOSE("DML::%s: ODMMode = %u\n", __func__, p->myPipe->ODMMode); in dcn5_calculate_prefetch_schedule()5545 l->odm_mode = mode_lib->mp.ODMMode[l->plane_idx]; in dcn5_rq_dlg_get_dlg_reg()
118 enum odm_combine_mode ODMMode; member