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Searched refs:ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h14119 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_0_3_sh_mask.h14225 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h22792 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_2_1_sh_mask.h24206 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h27106 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_5_1_sh_mask.h20830 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_5_0_sh_mask.h20851 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h29125 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h27148 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h29889 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h31044 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h26121 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h30455 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h29614 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro
H A Ddcn_3_2_0_sh_mask.h24230 #define ODM0_OPTC_WIDTH_CONTROL__OPTC_DSC_SLICE_WIDTH__SHIFT macro