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Searched refs:NumMemPstatesEnabled (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_smu.h121 uint8_t NumMemPstatesEnabled; member
149 uint8_t NumMemPstatesEnabled; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/
H A Ddcn42_clk_mgr.c923 dpm_clks->NumMemPstatesEnabled, in dcn42_get_smu_clocks()
992 ASSERT(dpm_clks->NumMemPstatesEnabled <= NUM_MEM_PSTATE_LEVELS); in dcn42_get_smu_clocks()
993 if (dpm_clks->NumMemPstatesEnabled > NUM_MEM_PSTATE_LEVELS) in dcn42_get_smu_clocks()
994 dpm_clks->NumMemPstatesEnabled = NUM_MEM_PSTATE_LEVELS; in dcn42_get_smu_clocks()
995 for (i = 0; i < dpm_clks->NumMemPstatesEnabled; i++) { in dcn42_get_smu_clocks()
996 …clk_mgr_base->bw_params->clk_table.entries[dpm_clks->NumMemPstatesEnabled - 1 - i].memclk_mhz = dp… in dcn42_get_smu_clocks()
997 …clk_mgr_base->bw_params->clk_table.entries[dpm_clks->NumMemPstatesEnabled - 1 - i].wck_ratio = dcn… in dcn42_get_smu_clocks()
999 …_base->bw_params->clk_table.num_entries_per_clk.num_memclk_levels = dpm_clks->NumMemPstatesEnabled; in dcn42_get_smu_clocks()