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Searched refs:NUM_VCN_DPM_LEVELS (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_smu.h80 #define NUM_VCN_DPM_LEVELS 8 macro
108 uint32_t VClocks[NUM_VCN_DPM_LEVELS];
109 uint32_t DClocks[NUM_VCN_DPM_LEVELS];
134 uint32_t VClocks0[NUM_VCN_DPM_LEVELS];
135 uint32_t VClocks1[NUM_VCN_DPM_LEVELS];
136 uint32_t DClocks0[NUM_VCN_DPM_LEVELS];
137 uint32_t DClocks1[NUM_VCN_DPM_LEVELS];
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_v13_0_5.h47 #define NUM_VCN_DPM_LEVELS 4 macro
115 uint32_t VClocks[NUM_VCN_DPM_LEVELS];
116 uint32_t DClocks[NUM_VCN_DPM_LEVELS];
H A Dsmu13_driver_if_yellow_carp.h107 #define NUM_VCN_DPM_LEVELS 8 macro
126 uint32_t VClocks[NUM_VCN_DPM_LEVELS];
127 uint32_t DClocks[NUM_VCN_DPM_LEVELS];
H A Dsmu12_driver_if.h109 #define NUM_VCN_DPM_LEVELS 8 macro
121 DpmClock_t VClocks[NUM_VCN_DPM_LEVELS];
122 DpmClock_t DClocks[NUM_VCN_DPM_LEVELS];
H A Dsmu13_driver_if_v13_0_4.h108 #define NUM_VCN_DPM_LEVELS 8 macro
127 uint32_t VClocks[NUM_VCN_DPM_LEVELS];
128 uint32_t DClocks[NUM_VCN_DPM_LEVELS];
H A Dsmu11_driver_if_vangogh.h109 #define NUM_VCN_DPM_LEVELS 5 macro
134 vcn_clk_t VcnClocks[NUM_VCN_DPM_LEVELS];
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.h36 #define NUM_VCN_DPM_LEVELS 4 macro
74 uint32_t VClocks[NUM_VCN_DPM_LEVELS];
75 uint32_t DClocks[NUM_VCN_DPM_LEVELS];
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.h36 #define NUM_VCN_DPM_LEVELS 8 macro
82 uint32_t VClocks[NUM_VCN_DPM_LEVELS];
83 uint32_t DClocks[NUM_VCN_DPM_LEVELS];
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.h109 #define NUM_VCN_DPM_LEVELS 8 macro
135 uint32_t VClocks[NUM_VCN_DPM_LEVELS];
136 uint32_t DClocks[NUM_VCN_DPM_LEVELS];
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.h54 uint32_t VClocks[NUM_VCN_DPM_LEVELS];
55 uint32_t DClocks[NUM_VCN_DPM_LEVELS];