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Searched refs:NUM_PHASES (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dwb_scl.c32 #define NUM_PHASES 16 macro
696 for (phase = 0; phase < (NUM_PHASES / 2 + 1); phase++) { in wbscl_set_scaler_filter()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/
H A Ddcn401_dpp_cm.c35 #define NUM_PHASES 64 macro
H A Ddcn401_dpp_dscl.c35 #define NUM_PHASES 64 macro
258 for (phase = 0; phase < (NUM_PHASES / 2 + 1); phase++) { in dpp401_dscl_set_scaler_filter()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
H A Ddcn10_dpp_dscl.c35 #define NUM_PHASES 64 macro
256 for (phase = 0; phase < (NUM_PHASES / 2 + 1); phase++) { in dpp1_dscl_set_scaler_filter()
H A Ddcn10_dpp.c34 #define NUM_PHASES 64 macro
H A Ddcn10_dpp_cm.c35 #define NUM_PHASES 64 macro
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn20/
H A Ddcn20_dpp.c34 #define NUM_PHASES 64 macro