Searched refs:NUM_DPPCLK_DPM_LEVELS (Results 1 – 13 of 13) sorted by relevance
78 #define NUM_DPPCLK_DPM_LEVELS 8 macro106 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];132 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
1060 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) { in dcn35_clk_mgr_helper_populate_bw_params()1131 find_max_clk_value(clock_table->DppClocks, NUM_DPPCLK_DPM_LEVELS); in dcn35_clk_mgr_helper_populate_bw_params()1362 for (i = 0; i < NUM_DPPCLK_DPM_LEVELS; i++) in translate_to_DpmClocks_t_dcn35()
45 #define NUM_DPPCLK_DPM_LEVELS 4 macro113 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
105 #define NUM_DPPCLK_DPM_LEVELS 8 macro124 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
106 #define NUM_DPPCLK_DPM_LEVELS 8 macro125 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
105 #define NUM_DPPCLK_DPM_LEVELS 7 macro130 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
38 #define NUM_DPPCLK_DPM_LEVELS 8 macro1047 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz1407 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz
39 #define NUM_DPPCLK_DPM_LEVELS 8 macro1056 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz1400 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz
36 #define NUM_DPPCLK_DPM_LEVELS 8 macro1147 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz1632 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz
34 #define NUM_DPPCLK_DPM_LEVELS 4 macro72 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
34 #define NUM_DPPCLK_DPM_LEVELS 8 macro80 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
107 #define NUM_DPPCLK_DPM_LEVELS 8 macro133 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
52 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];