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Searched refs:NUM_CHANNELS (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/edac/
H A Digen6_edac.c46 #define NUM_CHANNELS 2 /* Max channels */ macro
161 u64 dimm_s_size[NUM_CHANNELS];
162 u64 dimm_l_size[NUM_CHANNELS];
163 int dimm_l_map[NUM_CHANNELS];
1103 for (i = 0; i < NUM_CHANNELS; i++) { in igen6_get_dimm_config()
1170 for (i = 0; i < NUM_CHANNELS; i++) { in igen6_reg_dump()
1309 layers[0].size = NUM_CHANNELS; in igen6_register_mci()
H A Dsb_edac.c288 #define NUM_CHANNELS 6 /* Max channels per MC */ macro
391 struct pci_dev *pci_tad[NUM_CHANNELS];
396 struct sbridge_channel channel[NUM_CHANNELS];
1593 : NUM_CHANNELS; in __populate_dimms()
1869 for (i = 0; i < NUM_CHANNELS; i++) { in get_memory_layout()
1889 for (i = 0; i < NUM_CHANNELS; i++) { in get_memory_layout()
2380 if (channel >= NUM_CHANNELS) { in get_memory_error_data_from_mce()
3202 first_channel = find_first_bit(&channel_mask, NUM_CHANNELS); in sbridge_mce_output_error()
3358 KNL_MAX_CHANNELS : NUM_CHANNELS; in sbridge_register_mci()
/linux/drivers/clk/berlin/
H A Dberlin2-avpll.c29 #define NUM_CHANNELS 8 macro
/linux/drivers/net/ethernet/toshiba/
H A Dps3_gelic_wireless.c52 #define NUM_CHANNELS ARRAY_SIZE(channel_freq) macro
315 i < NUM_CHANNELS && chs < IW_MAX_FREQUENCIES; i++) in gelic_wl_get_range()
/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-dp.c109 #define NUM_CHANNELS GENMASK(14, 12) macro