| /linux/arch/alpha/include/asm/ |
| H A D | irq.h | 29 # define NR_IRQS (128) /* max is RAWHIDE/TAKARA */ macro
31 # define NR_IRQS (32768 + 16) /* marvel - 32 pids */ macro
36 # define NR_IRQS 35 macro
39 # define NR_IRQS 32 macro
46 # define NR_IRQS 48 macro
50 # define NR_IRQS 40 macro
54 # define NR_IRQS 64 macro
57 #define NR_IRQS 80 macro
62 # define NR_IRQS 128 macro
65 # define NR_IRQS 2048 /* enuff for 8 QBBs */ macro
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| /linux/arch/sparc/kernel/ |
| H A D | irq_32.c | 100 * Virutal interrupt numbers are allocated by build_irq(). So NR_IRQS
103 * about 32 interrupt sources or so, therefore a NR_IRQS value of 64
113 static struct irq_bucket irq_table[NR_IRQS];
129 for (i = 1; i < NR_IRQS; i++) { in irq_alloc()
134 for (i = 1; i < NR_IRQS; i++) { in irq_alloc()
139 if (i < NR_IRQS) { in irq_alloc()
163 BUG_ON(irq >= NR_IRQS); in irq_link()
181 BUG_ON(irq >= NR_IRQS); in irq_unlink()
254 cpu_irq = (irq & (NR_IRQS - 1)); in sparc_floppy_request_irq()
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| /linux/tools/arch/x86/include/asm/ |
| H A D | irq_vectors.h | |
| /linux/arch/x86/include/asm/ |
| H A D | irq_vectors.h | 134 #define NR_IRQS \ macro
139 #define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT) macro
141 #define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT) macro
143 #define NR_IRQS NR_IRQS_LEGACY macro
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| /linux/tools/perf/trace/beauty/arch/x86/include/asm/ |
| H A D | irq_vectors.h | 134 #define NR_IRQS \ macro
139 #define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT) macro
141 #define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT) macro
143 #define NR_IRQS NR_IRQS_LEGACY macro
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| /linux/arch/mips/include/asm/mach-db1x00/ |
| H A D | irq.h | 12 #ifdef NR_IRQS
13 #undef NR_IRQS
21 #define NR_IRQS 152 macro
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| /linux/include/asm-generic/ |
| H A D | irq.h | 10 #ifndef NR_IRQS
11 #define NR_IRQS 64 macro
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| /linux/arch/mips/include/asm/mach-generic/ |
| H A D | irq.h | 11 #ifndef NR_IRQS
12 #define NR_IRQS 256 macro
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| /linux/arch/um/include/asm/ |
| H A D | irq.h | 33 #define NR_IRQS (UM_LAST_SIGNAL_IRQ + 64) macro
35 #define NR_IRQS UM_LAST_SIGNAL_IRQ macro
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| /linux/arch/arm/mach-sa1100/include/mach/ |
| H A D | irqs.h | 98 #ifndef NR_IRQS
99 #define NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO) macro
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| /linux/drivers/irqchip/ |
| H A D | irq-xtensa-pic.c | 88 irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0, in xtensa_pic_init_legacy()
98 irq_domain_add_linear(np, NR_IRQS, &xtensa_irq_domain_ops, in xtensa_pic_init()
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| H A D | irq-pic32-evic.c | 36 u32 irq_types[NR_IRQS];
173 if (WARN_ON(intspec[0] >= NR_IRQS)) in pic32_irq_domain_xlate()
218 nchips = DIV_ROUND_UP(NR_IRQS, 32); in pic32_of_init()
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| H A D | irq-xtensa-mx.c | 170 irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0, in xtensa_mx_init_legacy()
181 irq_domain_add_linear(np, NR_IRQS, &xtensa_mx_irq_domain_ops, in xtensa_mx_init()
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| /linux/arch/m68k/coldfire/ |
| H A D | intc.c | 28 unsigned char mcf_irq2imr[NR_IRQS];
144 for (irq = 0; (irq < NR_IRQS); irq++) { in init_IRQ()
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| /linux/arch/mips/rb532/ |
| H A D | irq.c | 55 #if (NR_IRQS < RC32434_NR_IRQS)
205 pr_info("Initializing IRQ's: %d out of %d\n", RC32434_NR_IRQS, NR_IRQS); in arch_init_irq()
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| /linux/arch/mips/include/asm/mach-lantiq/xway/ |
| H A D | irq.h | 12 #define NR_IRQS 256 macro
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| /linux/arch/mips/include/asm/mach-lantiq/falcon/ |
| H A D | irq.h | 12 #define NR_IRQS 328 macro
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| /linux/arch/mips/include/asm/mach-malta/ |
| H A D | irq.h | 6 #define NR_IRQS 256 macro
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| /linux/arch/mips/include/asm/mach-n64/ |
| H A D | irq.h | 5 #define NR_IRQS 8 macro
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| /linux/arch/mips/include/asm/mach-bcm63xx/ |
| H A D | irq.h | 5 #define NR_IRQS 128 macro
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| /linux/arch/mips/include/asm/mach-ralink/ |
| H A D | irq.h | 6 #define NR_IRQS 256 macro
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| /linux/arch/openrisc/include/asm/ |
| H A D | irq.h | 18 #define NR_IRQS 32 macro
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| /linux/arch/mips/include/asm/mach-pic32/ |
| H A D | irq.h | 9 #define NR_IRQS 256 macro
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| /linux/arch/hexagon/include/asm/ |
| H A D | irq.h | 19 #define NR_IRQS 512 macro
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| /linux/arch/sparc/include/asm/ |
| H A D | irq_32.h | 14 #define NR_IRQS 64 macro
|