Searched refs:MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 (Results 1 – 9 of 9) sorted by relevance
24 #define MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x002C 0x0070 0x0000 0x5 0x0 macro
16 MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x3031
33 MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
349 MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x400120b0 /* WL_REG_ON */
453 MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x17000
342 MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79
736 MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x130a0
617 fsl,pins = <MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x400120b0>;
739 MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x400100b0