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Searched refs:MUX_GATE (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt2712.c648 MUX_GATE(CLK_TOP_MM_SEL, "mm_sel", mm_parents, 0x040, 24, 3, 31),
650 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x050, 0, 2, 7),
651 MUX_GATE(CLK_TOP_VDEC_SEL, "vdec_sel", vdec_parents, 0x050, 8, 4, 15),
652 MUX_GATE(CLK_TOP_VENC_SEL, "venc_sel", venc_parents, 0x050, 16, 4, 23),
653 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x050, 24, 4, 31),
655 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents, 0x060, 0, 4, 7),
656 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x060, 8, 1, 15),
657 MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x060, 16, 3, 23),
658 MUX_GATE(CLK_TOP_USB20_SEL, "usb20_sel", usb20_parents, 0x060, 24, 2, 31),
660 MUX_GATE(CLK_TOP_USB30_SEL, "usb30_sel", usb30_parents, 0x070, 0, 2, 7),
[all …]
H A Dclk-mt8135.c354 MUX_GATE(CLK_TOP_AXI_SEL, "axi_sel", axi_parents,
356 MUX_GATE(CLK_TOP_SMI_SEL, "smi_sel", smi_parents, 0x0140, 8, 4, 15),
357 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x0140, 16, 4, 23),
358 MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel", irda_parents, 0x0140, 24, 2, 31),
360 MUX_GATE(CLK_TOP_CAM_SEL, "cam_sel", cam_parents, 0x0144, 0, 3, 7),
361 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
363 MUX_GATE(CLK_TOP_JPG_SEL, "jpg_sel", jpg_parents, 0x0144, 16, 3, 23),
364 MUX_GATE(CLK_TOP_DISP_SEL, "disp_sel", disp_parents, 0x0144, 24, 3, 31),
366 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_parents, 0x0148, 0, 3, 7),
367 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_parents, 0x0148, 8, 3, 15),
[all …]
H A Dclk-mt8173-topckgen.c537 MUX_GATE(CLK_TOP_MM_SEL, "mm_sel", mm_parents, 0x0040, 24, 4, 31),
539 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0050, 0, 2, 7),
540 MUX_GATE(CLK_TOP_VDEC_SEL, "vdec_sel", vdec_parents, 0x0050, 8, 4, 15),
541 MUX_GATE(CLK_TOP_VENC_SEL, "venc_sel", venc_parents, 0x0050, 16, 4, 23),
542 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x0050, 24, 4, 31),
544 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents, 0x0060, 0, 3, 7),
545 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x0060, 8, 1, 15),
546 MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x0060, 16, 3, 23),
547 MUX_GATE(CLK_TOP_USB20_SEL, "usb20_sel", usb20_parents, 0x0060, 24, 2, 31),
549 MUX_GATE(CLK_TOP_USB30_SEL, "usb30_sel", usb30_parents, 0x0070, 0, 2, 7),
[all …]
H A Dclk-mt7622.c392 MUX_GATE(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
396 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
398 MUX_GATE(CLK_TOP_F10M_REF_SEL, "f10m_ref_sel", f10m_ref_parents,
400 MUX_GATE(CLK_TOP_NFI_INFRA_SEL, "nfi_infra_sel", nfi_infra_parents,
402 MUX_GATE(CLK_TOP_FLASH_SEL, "flash_sel", flash_parents,
406 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents,
408 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
410 MUX_GATE(CLK_TOP_SPI1_SEL, "spi1_sel", spi1_parents,
412 MUX_GATE(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", uart_parents,
416 MUX_GATE(CLK_TOP_MSDC30_0_SEL, "msdc30_0_sel", msdc30_0_parents,
[all …]
H A Dclk-mt7629.c462 MUX_GATE(CLK_TOP_AXI_SEL, "axi_sel", axi_parents,
464 MUX_GATE(CLK_TOP_MEM_SEL, "mem_sel", mem_parents,
466 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
468 MUX_GATE(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
471 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
473 MUX_GATE(CLK_TOP_F10M_REF_SEL, "f10m_ref_sel", f10m_ref_parents,
475 MUX_GATE(CLK_TOP_NFI_INFRA_SEL, "nfi_infra_sel", nfi_infra_parents,
477 MUX_GATE(CLK_TOP_FLASH_SEL, "flash_sel", flash_parents,
480 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents,
482 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
[all …]
H A Dclk-mt2701.c493 MUX_GATE(CLK_TOP_MM_SEL, "mm_sel", mm_parents,
496 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
498 MUX_GATE(CLK_TOP_VDEC_SEL, "vdec_sel", vdec_parents,
500 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents,
502 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents,
504 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents,
507 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi_parents,
509 MUX_GATE(CLK_TOP_USB20_SEL, "usb20_sel", usb20_parents,
511 MUX_GATE(CLK_TOP_MSDC30_0_SEL, "msdc30_0_sel", msdc30_parents,
514 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_parents,
[all …]
H A Dclk-mt6797.c333 MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
334 MUX_GATE(CLK_TOP_MUX_VDEC, "vdec_sel", vdec_parents, 0x0050, 8, 3, 15),
335 MUX_GATE(CLK_TOP_MUX_VENC, "venc_sel", venc_parents, 0x0050, 16, 2, 23),
336 MUX_GATE(CLK_TOP_MUX_MFG, "mfg_sel", mfg_parents, 0x0050, 24, 2, 31),
337 MUX_GATE(CLK_TOP_MUX_CAMTG, "camtg_sel", camtg, 0x0060, 0, 2, 7),
338 MUX_GATE(CLK_TOP_MUX_UART, "uart_sel", uart_parents, 0x0060, 8, 1, 15),
339 MUX_GATE(CLK_TOP_MUX_SPI, "spi_sel", spi_parents, 0x0060, 16, 2, 23),
342 MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
346 MUX_GATE(CLK_TOP_MUX_MSDC50_0, "msdc50_0_sel", msdc50_0_parents,
348 MUX_GATE(CLK_TOP_MUX_MSDC30_1, "msdc30_1_sel", msdc30_1_parents,
[all …]
H A Dclk-mtk.h141 #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ macro
H A Dclk-mt8365.c393 MUX_GATE(CLK_TOP_MBIST_DIAG_SEL, "mbist_diag_sel", mbist_diag_parents,